Inside the Making of a Photonic Chip: A Visual Simulation

PHOTONIC CHIPS · MANUFACTURING · VIGO · BASKETBALL

A basketball arena can send a replay to a control room through an optical fibre. In the equipment at either end, photonic chips may generate, manipulate or detect the light that carries information. But how do we make these tiny circuits?

This is a particularly interesting question in Vigo, where a new compound-semiconductor factory is under construction. It is a good opportunity to look at what goes into making a photonic chip, from the initial design to the finished module.

Concept of a packaged photonic chip, taken from our AI-generated film. The basketball symbol on the enclosure is an illustration, not an announced Ardora product.

In my previous post about custom chips for a basketball rebounding robot, the photonic option was a possible future direction. Here I want to look at the manufacturing itself. A basketball on the package gives the chip character. Unfortunately, it does not grow the semiconductor layers for us., I discussed photonics as one possible direction for future development. This time I want to concentrate on how these chips are actually manufactured.

The image of a chip with a basketball on its package looks rather attractive to me. Unfortunately, decorating the package is probably the easiest part of the manufacturing process.

SPARC is now Ardora III-V

The company previously known as SPARC Foundry has changed its name to Ardora III-V. It is developing a semiconductor foundry in Vigo using materials such as indium phosphide (InP), gallium arsenide (GaAs) and gallium nitride (GaN). Its announced activities include photonic and radiofrequency applications.^[1]

Indra Group reported a 37% shareholding in the company on 30 January 2026, when construction of the factory began. The plant, located in Valadares, is expected to start operating during 2027.^[2]

That is the announced timetable. It does not mean that industrial production has already begun.

There is something worth understanding about this type of company. Ardora describes itself as a pure-play foundry, which means that it can manufacture semiconductor devices for customers who own their designs.

A customer does not necessarily need a semiconductor factory. It may be a company specialising in circuit design, with the foundry providing the manufacturing technology. The customer can retain ownership of its designs and intellectual property.^[3]

However, that does not make the foundry's work simple. Quite the opposite.

Ardora is also recruiting engineers specialising in epitaxy, the process used to grow crystalline semiconductor layers. Its job description refers to developing, qualifying and transferring manufacturing processes for GaN, InP and GaAs.^[4]

These processes require considerable technical knowledge. A manufacturing engineer has to control the materials, their characteristics and the consistency of production, regardless of who designed the final circuit.

I have not found a complete, publicly available manufacturing recipe for Ardora, nor a definitive description of every packaging operation that will take place inside its factory.

That is why the process explained below should not be mistaken for Ardora's own production method.

Why use indium phosphide?

Indra's announcement gives particular importance to gallium nitride because of its applications in radiofrequency electronics and radar systems.

But a radar transistor made from GaN is not the same thing as a photonic integrated circuit.

For the manufacturing example, I have chosen indium phosphide (InP), a material used in photonic chips that can combine several optical functions on the same semiconductor substrate.

Depending on the design, an InP circuit can generate light, amplify it, modulate it, guide it through tiny structures and detect it.^[5]

This is one of the interesting features of integrated photonics. Instead of connecting a collection of separate optical components, engineers can place several of them on a single chip.

It reminds me of the general idea behind electronic integrated circuits, although the physics and manufacturing technologies are not identical.

InP is particularly suitable for circuits that need active optical components, including lasers and amplifiers. Other platforms, such as silicon and silicon nitride, have different advantages.

The choice of material therefore depends on what we want the circuit to do.

The InP manufacturing route illustrated in this article is based on published industrial and academic examples. It is not a reconstruction of Ardora's unpublished production line.

Follow the manufacturing process

A photonic chip does not appear immediately after someone draws its circuit on a computer.

First, the design has to be compatible with the manufacturing technology. Then the appropriate semiconductor layers are grown, patterns are transferred onto them, material is removed or deposited, and electrical contacts are formed.

After that, the devices still have to be separated, connected, protected and tested.

I have divided the process into 15 main groups to make it easier to follow.

These groups are an explanation, not 15 individual operations performed once each. In reality, some tasks have to be repeated many times.

A study from Eindhoven University of Technology described a particular InP fabrication process containing 243 steps.^[6] That number belongs to the process studied by its authors; it is not the number of operations used by Ardora.

Interactive manufacturing process

From wafer to photonic chip

Representative InP route · grouped processes

Stage 1 · Design and masks 2 · Starting wafer 3 · Layer growth 4 · Active and passive regions 5 · Resist and mask 6 · Exposure and development 7 · Waveguide etching 8 · Protection and planarisation 9 · Electrical contacts 10 · In-process measurement 11 · Thinning and separation 12 · Facets and coatings 13 · Mounting and connections 14 · Optical alignment and closure 15 · Final testing and improvement

1 / 15

Design and masks

Highlighted part or operation Support and structure

The customer uses the foundry rules; the design becomes manufacturing patterns.

Design · customer and foundry

Not to scale · not a published Ardora process recipe

The interactive diagram allows us to move through the manufacturing stages and see what each operation contributes to the chip.

It is easier to understand the overall process this way, although a real production line is considerably more complicated. Cleaning, lithography, etching and inspections appear repeatedly, and certain devices require additional growth of semiconductor layers.

The complete route, without the animation

Stage	What changes physically?
1. Design	The optical functions are defined, the circuit is simulated and the foundry's design rules are checked. The patterns needed for manufacturing are prepared.
2. Starting wafer	A crystalline semiconductor wafer is inspected. Many circuits can be manufactured on the same wafer.
3. Epitaxy	Thin crystalline layers are grown with carefully controlled composition, thickness and doping. Doping changes the electrical properties of the semiconductor.
4. Active and passive integration	Regions that generate or amplify light are combined with structures that guide it. Some manufacturing methods require selective removal and further crystal growth.
5–6. Lithography	A light-sensitive material called photoresist is applied. The required pattern is aligned, exposed and developed. Some particularly fine features may use electron-beam lithography.
7. Etching and cleaning	Material is removed according to the pattern, producing waveguides and other structures. The remaining residues are cleaned away.
8. Protection	Insulating and protective layers are deposited. The surface may also need to be levelled before further processing.
9. Metallisation	Metal contacts and connections are formed to supply and control the electrically active sections of the circuit.
10. Process checks	Dimensions, material characteristics and device performance are examined at suitable stages of fabrication.
11–12. Backend	The wafer may be thinned or polished before separation into bars or individual chips. Optical facets and reflective or anti-reflective coatings are prepared as required.
13–14. Packaging	The chip is mounted, heat is managed, electrical connections are made, and optical fibres or other components are aligned and fixed.
15. Final testing	The completed module is characterised, calibrated where necessary and subjected to appropriate reliability tests.

The manufacturing stages are supported by published information from SMART Photonics and the Eindhoven fabrication study. Fraunhofer HHI provides useful explanations of backend processing and packaging.^[7][8][9]

It is important to distinguish the chip from the final module. A semiconductor foundry may manufacture the chip, while a specialised company performs some or all of the packaging operations.

From a wafer to a finished photonic module

Watch the simulation on YouTube

Illustrative simulation of selected stages in InP photonic chip fabrication and packaging. The 20 labelled phases give a simplified overview; they do not reproduce Ardora III-V's production line or document a complete, verified manufacturing process.

The video brings together the operations discussed above, from design and wafer handling to assembly and testing. Some steps are condensed or omitted, and the chip changes appearance between scenes. The 15 groups in the interactive diagram and the table provide the context for following the sequence.

I find the idea of turning a relatively plain semiconductor wafer into a circuit that generates, guides or detects light particularly interesting. But making the chip is only part of the work: we still have to connect it to the outside world.

A possible improvement: losing less light at the connection

If I had to choose one aspect of the process for further investigation, I would concentrate on the connection between the chip and the optical fibre.

We might think that making the chip smaller is always the most interesting improvement. But a very good chip can lose some of its advantages if the light does not enter or leave it efficiently.

Inside the chip, light travels through structures called waveguides. These confine and guide the optical signal along the desired path.

The optical fibre also guides light, but its optical mode — the spatial distribution of the light — may be different from the mode inside the chip.

Connecting the two can therefore produce losses.

Another difficulty is alignment. If the fibre moves slightly away from its ideal position, the amount of light entering the circuit may decrease.

This is not a new problem. Research organisations such as imec are already investigating optical interfaces designed to improve coupling efficiency and make packaging more suitable for industrial production.^[10]

I would like to examine a comparison between two possible coupler geometries on the same InP platform.

The first would use a conventional geometry compatible with the selected manufacturing process. The second would introduce a more gradual transition, designed to expand the optical mode towards the fibre.

The purpose would be to see whether the second geometry offers any practical advantage.

I would compare them using the same operating wavelength, fibre type, temperature conditions and measurement equipment. Then I would deliberately change the alignment to see how each design behaves.

Four measurements would be especially useful:

1. Insertion loss: how much optical power is lost at the connection.
2. Alignment tolerance: how far the fibre can move before losses become unacceptable.
3. Assembly time: how long it takes to align and fix the components correctly.
4. Thermal cycling: how the connection performs after repeated changes in temperature.

The last two measurements are important because the best laboratory result is not necessarily the best manufacturing solution.

For example, a coupler that produces slightly greater losses under ideal alignment might still be attractive if it is considerably easier to assemble and maintains its performance under normal manufacturing variations.

Of course, this would have to be demonstrated experimentally.

The proposed geometry would also need to respect the actual design rules of the selected InP foundry. A structure that looks promising in simulation is not much use if it cannot be manufactured reliably.

I am not presenting this as an invention or a proven improvement. It is a specific experiment I consider worth investigating.

A possible connection to Vigo Arena

How does all this relate to basketball?

In my article about the technology behind a basketball arena. Ardora could be considered as a component-manufacturing or development partner in an optical communications or sensing project, alongside designers, module suppliers and integrators. Indra could also be considered for a systems collaboration, subject to a real technical offer. Neither company should be assumed to supply a complete arena network just because it works with chips., I considered some of the systems that could be incorporated into a modern sports facility.

Optical communications and sensing are among the technological areas worth examining.

A future Vigo Arena could require high-capacity communications between audiovisual equipment, technical rooms and other systems. Depending on the final architecture, photonic components might form part of the equipment used in those networks.

This does not mean that Ardora manufactures complete arena communication systems. Its announced business is semiconductor manufacturing, which is a different activity.

Nevertheless, Ardora could be considered as a possible manufacturing or development participant in a suitable optical communications or sensing project, working alongside circuit designers, module suppliers and system integrators.

Indra could also be considered for a systems-level collaboration, provided there were a real technical and commercial proposal.

For me, an initial technical demonstration could be more useful than immediately talking about a large sponsorship agreement.

For example, a small project could investigate the performance of a photonic component in an optical communications or sensing application. It could also involve local engineers, students or research groups, if the necessary partners were interested.

The proposed fibre-to-chip coupling comparison might be an appropriate subject for a technical study, although it should not be assumed that an arena would need that particular component.

There is also the sporting side.

If a future basketball team from Vigo became part of NBA Europe, technological companies could evaluate commercial sponsorship or other forms of collaboration. That would depend on the existence of the team, the companies' interests and the economics of the proposals.

At present, these are possibilities rather than agreements. Neither Ardora nor Indra has been identified here as having committed to such a project.

I think it makes sense to distinguish what can be technically investigated now from what might become commercially possible later.

Conclusion

What I find most interesting about the semiconductor project in Vigo is not simply that another industrial facility is being built. It is the possibility of developing the industrial knowledge required to transform electronic and photonic designs into real semiconductor devices.

Manufacturing these chips involves much more than drawing patterns on a wafer.

The crystalline layers must have the required properties. The optical structures must be manufactured with sufficient precision. Electrical connections, packaging and testing must then turn the chip into something that can actually be used.

InP is a good example because it allows several optical functions to be integrated on the same chip. GaN and GaAs provide other possibilities, depending on the application.

The manufacturing process presented here is an illustrative InP route, not Ardora's actual production procedure. Understanding that difference is important, particularly when an AI-generated film makes everything appear so realistic.

As for a possible improvement, I would begin with the connection between the fibre and the chip. Comparing two coupling geometries, measuring their losses and alignment tolerances, and checking their behaviour during assembly and after thermal cycling would be a reasonable first investigation.

It might produce an improvement, or it might show that the existing solution is already preferable. Both outcomes would be useful.

The next step would be to find out whether the result can be manufactured reliably and at an acceptable cost.

The potential relationship with Vigo Arena is still more distant, but it is an example of how local semiconductor capabilities could eventually connect with other projects in the city.

In basketball, a play can look excellent on the coach's board and fail completely when the defenders start moving.

Something similar happens in engineering. A design can look perfect on the computer, but the real test begins when we have to manufacture it, connect it and make it work.

Sources

1. Ardora III-V, official website: corporate identity and semiconductor manufacturing activities. ↩ Back
2. Indra Group, construction of the semiconductor factory in Vigo, Indra's participation and expected operational timetable, 30 January 2026. ↩ Back
3. Ardora III-V, company description and customer intellectual property. ↩ Back
4. Ardora III-V, Senior Process Engineer: Epitaxy (III-V Foundry). ↩ Back
5. SMART Photonics, InP technology, photonic integration and manufacturing services. ↩ Back
6. Docter et al., The 243 Steps of Making Photonic Integrated Circuits in InP, Eindhoven University of Technology, 2010. ↩ Back
7. SMART Photonics, An Independent InP Foundry in the Integrated Photonics Supply Chain, presentation by Peter Maat. ↩ Back
8. Fraunhofer HHI, Backend and Packaging. ↩ Back
9. Fraunhofer HHI, Foundry Services for InP-Based Photonic Integrated Circuits. ↩ Back
10. imec, Interfacing Silicon Photonics for High-Density Co-Packaged Optics. The reported silicon and silicon-nitride platform results should not be transferred directly to InP. ↩ Back

Editorial reference date: 29 October 2026. The coupling experiment and possible Vigo Arena collaborations are proposals. No experimental results, commercial commitments or company participation are claimed.